FPGA Based Bert for Wireless Communication System: A Review

Muktai Surnar, S. S. Thorat

Abstract: The FPGA-based BERT increases speed of simulations in systems. These FPGA-based solutions are more cost effective than conventional performance measurements made using expensive test equipment. Basically the BERT Consists of PRBS (Pseudo Random Binary Sequence) Generator Module in the Transmitter Side and Pseudo Random Pulse signal is transmitted by the Serial link. The receiver generate the same signal and compare with the transmitted signal, if any errors occurs like bit slip, bit error. Then Additive white Gaussian noise (AWGN) generator can detect the number of errors and these errors are evaluated by the BERT which estimate the error rate w.r.t number of bits.In wireless network communication systems exchange of information depends on networked Computers, mobile phones and other internet operated systems. Unsecured data that travels through different networks are get damaged by many types of attack, noises and interrupted by anyone who has access to that data. To prevent such interruptions, data must be encrypted and decrypted with effective techniques are employed.

Keywords: BERT (bit error rate tester),CRC encoding, Cryptography, encryption, decryption