International Journal of Scientific Engineering and Research (IJSER)
Call for Papers | Fully Refereed | Open Access | Double Blind Peer Reviewed | ISSN: 2347-3878


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India | Electronics and Communication Engineering | Volume 6 Issue 3, March 2018 | Pages: 28 - 32


VLSI Architecture for an Area Efficient Multiplication Using Number Theoretic Transform On Graphic Cards

C. Sai Punitha, D. Jessintha

Abstract: Abstract? The Number Theoretic Transform (NTT) introduced as a generalization of the Discrete Fourier Transform over residue-class rings of unity which have many applications in computer arithmetic and which allows the implementation of Digital Signal Processing operations with better efficiency and accuracy than Fast Fourier Transform without round off errors. The incorporation of double modulus entity reduces the computation time and the buffer reduction technique that is tailored for the special moduli required by the NTT. In this work, a multiplication algorithm based on double modulus NTT has been developed and the deployment of double moduli enlarges the permitted NTT sample size and thus improves the transform efficiency over large integer multiplication and an area efficient multiplication using Number Theoretic Transform (NTT) architecture is designed and verified using Xilinx tool and simulation results reveals the better performance of multipliered architecture rather than relaying on the multiplierless architecture and this can be employed in Graphics Processing Unit especially in Nvidia graphic cards which can be used in video filtering and High Definition image display for an area efficient memory operation.

Keywords: Number Theoretic Transform,Fast Fourier Transform,Double Moduli,Nvidia



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