Pipelined Implementation of CORDIC and 64-Point FFT with Memory Interfacing Module

K. Naga Chaitanya, Dr. P. Trinatha Rao

Abstract: Signal processing plays an important role in the field of communication Engineering. The amount of data that is received is processed by using different algorithms. Discrete Fourier Transform (DFT) is one of the technique that is used to compute the data. Direct computation of DFT results in complexity; as a result Fast Fourier Transform (FFT) is one of the algorithms to reduce the complexity. The proposed paper presents the parallel-pipelined implementation of radix-2 fixed point 32-point FFT algorithm using state machine as controller and fixed point pipelined implementation of Linear CORDIC that operates for the angles-?/2????/2. The result of 64-point FFT are obtained in M=?log?_2?N clock cycles due to multi processor technique. Initially FFT functionality is checked using MATLAB and finally simulated and synthesized using Xilinx ISE 14.1.Besides CORDIC algorithm is implemented in both MATLAB and in Xilinx on Virtex-7. The main objective of this work is to obtain an area efficient FFT and CORDIC without performance loss that could be used as a part of Signal processing.

Keywords: Signal processing, DFT, FFT, CORDIC, state machine controller